HEART 2016

International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies
Design Competition
July 25 - 27, 2016   //   Hong Kong

Overview

The HEART symposium is an international forum on state-of-the-art research in high-performance and power-efficient computing using accelerator technologies such as FPGAs, GPGPUs, and/or specialized accelerators. The seventh edition of HEART will take place in Hong Kong.

Photo Gallery

Thank you for a very successful HEART2016. You can recap some of the moments from the HEART2016 Photo Gallery.

See you at HEART2017!

Latest News

Call for Submissions:

Paper submission due:

Important dates (all 23:59 A.O.E.):

  • Early Registration Deadline:  June 19, 2016
  • Camera-ready due:  July 1, 2016 June 19, 2016
  • Symposium Dates:  July 25-27, 2016
Scope

The scope of the meeting includes, but is not limited to:

Architectures and systems:
  • Novel systems/platforms for efficient acceleration based on FPGA, GPU, and other devices
  • Heterogeneous processor architectures and systems for scalable, high-performance, high-reliability, and/or low-power computation
  • Reconfigurable and configurable hardware and systems including IP-cores, embedded systems, SoCs, and cluster/grid/cloud computing systems for scalable, high-performance and/or low-power processing
  • Custom computing system for domain-specific applications such as Big-data, multimedia, bioinformatics, cryptography, and more
  • Novel architectures and device technologies that can be applied to efficient acceleration, including many-core/NoC architectures, 3D-stacking technologies and optical devices

 

Software and applications:
  • Novel applications of high-performance computing and Big-data processing with efficientacceleration and custom computing
  • System software, compilers and programming languages for efficient accelerationsystems / platforms, including many-core processors, GPUs, FPGAs and otherreconfigurable /custom processors
  • Run-time techniques for acceleration, including Just-in-Time compilation and dynamicpartial-reconfiguration
  • Performance evaluation and analysis for efficient acceleration
  • High-level synthesis and design methodologies for heterogeneous, reconfigurable and/orcustom processors/systems
FPGA Design Contest 2016 (Trax)

Following the FPGA design competition in ICFPT2015, we are planning another Trax design contest at HEART2016. The regulation of this contest will be announced soon.

Hong Kong Scenes

Post proceedings

HEART History

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